Bit rate control interface for the recording and/or reading of digital data
US6356611B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 1998 |
| Grant date | Mar 12, 2002 |
| Priority date | — |
| Expiry date | Mar 19, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2205/061
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A control interface for the bit rate of digital data to be recorded as well as a control interface for the bit rate of digital data emanating from a reading device, particularly when the digital data constitutes a high bit rate uninterrupted data stream such as a video data stream in the MPEG II format. Each control interface comprises a memory circuit for storing the data to be recorded or to be read and a device for storing the data to be recorded or read in the memory circuit so as to fill the memory circuit to a predetermined level. The storing device includes a gauge for generating an information item giving the fill level of the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.