Manufacturing method of silicon device
US6358861B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2000 |
| Grant date | Mar 19, 2002 |
| Priority date | — |
| Expiry date | Sep 8, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/977
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method of manufacturing a silicon device with a single crystal structure, including forming etching start patterns on a surface of a silicon substrate; etching the silicon substrate by applying a voltage to the silicon substrate while the silicon substrate is immersed in a solution containing fluorine ions, with the silicon substrate used a positive electrode, to form narrow etched portions that extend into the substrate from the etching start patterns; and accelerating etching of the silicon substrate by increasing current flowing through the silicon substrate after the narrow etched portions have reached a predetermined depth, so that neighboring etched portions are in communication with each other below the narrow etched portions and a free standing structure including part of the silicon substrate is formed, and a hollow portion is formed below the free standing structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.