Different word size multiprocessor emulation
US6360194B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 8, 1998 |
| Grant date | Mar 19, 2002 |
| Priority date | — |
| Expiry date | Sep 8, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/455
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In the emulation of a target system utilizing a multiprocessor (12) host system (10) with a longer word length than the target system, processor, memory, and cache overhead are minimized by utilizing a locked compare-exchange to update fill words in memory. The old contents of a word (48) in memory are loaded (80) into a first register (52). A loop is then entered. The contents of the first register (52) are copied (82) into a second (54). The contents of the second register (54) are then appropriately modified (84), depending on the instruction being emulated. After a lock (90), the two registers are compare-exchanged (86) with the memory word (48), resulting in the modified second register (54) being written to the memory word (48) if the contents of the first register (52) match. Otherwise, the compare-exchange instruction (86) loads the current copy of the word (48) into the first register (52), and the loop repeats.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.