Method and apparatus reducing output noise in a digitally rebalanced accelerometer
US6360602B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 1999 |
| Grant date | Mar 26, 2002 |
| Priority date | — |
| Expiry date | Jul 29, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/506
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A closed loop accelerometer includes apparatus within an associated digital rebalance loop for reducing the presence of low frequency moding noise in the accelerometer output. In one embodiment, the digitized corrective signal is applied to a moving average filter. In a second embodiment, the corrective signal is modulated with a random function and, in a third embodiment, the digitized corrective signal is both randomized and applied to a moving average filter. In each embodiment, the periodic moding noise that results from the analog-to-digital conversion within the rebalance loop is significantly reduced from that observed in prior art systems.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.