Circuit structure including a passive element formed within a grid array substrate and method for making the same
US6362525B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 9, 1999 |
| Grant date | Mar 26, 2002 |
| Priority date | — |
| Expiry date | Nov 9, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K3/3436
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A circuit structure combines an integrated circuit with a passive circuit element formed within a grid-array substrate. Formation of the circuit structure includes forming a passive circuit element within one or more conductive layers of a grid-array substrate such as may be used for packaging of integrated circuits. A pair of terminals of the passive circuit element is coupled to a pair of passive element contact pads within a processed surface of the integrated circuit, thereby connecting the integrated circuit to the grid-array substrate. The same grid-array substrate may be used for formation of the passive circuit element and for packaging of the integrated circuit. In some embodiments the lateral extent of the integrated circuit overlaps the lateral extent of the passive circuit element. Alternatively, the passive circuit element may be laterally displaced from the integrated circuit. A low-loss substrate may be mounted onto the grid-array substrate, and laterally displaced from the integrated circuit such that the lateral extent of the low-loss substrate overlaps that of the passive circuit element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.