Integrated circuit with improved current mirror impedance and method of operation
US6362613B1 · kind B1 · utility
3Cited by
11References
37Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 13, 2000 |
| Grant date | Mar 26, 2002 |
| Priority date | — |
| Expiry date | Nov 13, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/262
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
An integrated circuit (200, 300, 500) includes a current mirror having high output impedance and also having an output device with a low drain-to-source saturation voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.