Active pull-up circuit
US6362664B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 1999 |
| Grant date | Mar 26, 2002 |
| Priority date | — |
| Expiry date | Apr 30, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00315
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An active pull-up circuit for connection to an input pin that receives high and low logic level signals and a high voltage signal whose level is higher than the high logic level. The active pull-up circuit includes a pull-up circuit that is coupled between the input pin and a voltage supply line, and a breaking circuit that is coupled between the pull-up circuit and the voltage supply line. The pull-up circuit selectively brings the input pin to the level of the voltage supply line, and the breaking circuit operates to inhibit the pull-up circuit when the high voltage signal is on the input pin. In a preferred embodiment, the breaking circuit inhibits the pull-up circuit by electrically isolating the pull-up circuit from the voltage supply line. A method for selectively pulling-up an input node is also provided. According to the method, the input node is pulled-up to the level of a supply voltage at least when the input node receives a floating voltage, and such pulling-up of the input node is inhibited at least when the input node receives a high voltage signal whose level is higher than the level of the supply voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.