Precision and fast recovery buffer
US6362666B1 · kind B1 · utility
8Cited by
11References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 30, 1999 |
| Grant date | Mar 26, 2002 |
| Priority date | — |
| Expiry date | Dec 30, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/01721
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An embodiment of the invention is directed to a buffer circuit having a closed loop negative feedback amplifier that is coupled to continuously drive a node to a predetermined set voltage. A precharge circuit is coupled to selectively drive the node at a higher rate than the amplifier. The buffer circuit is particularly useful for reducing the recovery and settling time of the node voltage when the node is suddenly subjected to a large, capacitive load.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.