Patent · US Expired

Variable pulse PWM DAC method and apparatus

US6362766B1 · kind B1 · utility

8Cited by
5References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 9, 2000
Grant dateMar 26, 2002
Priority date
Expiry dateFeb 9, 2020

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M1/822
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A variable pulse pulse width modulation digital-to-analog converter comprising: an input code register to store a digital input code to be converted; a PWM decoder, coupled to the input code register, to convert the input code to a series of pulses; an output driver circuit coupled to the PWM decoder, wherein the output driver circuit generates an output signal comprising pulses of a high logic level and pulses of an intermediate logic level; and a filter to integrate the pulses to generate an analog output value corresponding to the digital input code. In one embodiment, the output stage comprises an active tri-state driver, a multiplexer and at least two output reference voltage sources. Using a plurality of different amplitude pulse levels enables PWM DACs according to the present invention to provide greater resolution than conventional PWM DACs for a given clock frequency and conversion period.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.