Methods for simultaneous analog-to-digital conversion and multiplication
US6362767B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 1999 |
| Grant date | Mar 26, 2002 |
| Priority date | — |
| Expiry date | Mar 22, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/78
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method of simultaneously providing A/D conversion and multiplication in a Bit-Serial ADCs and single slope ADCs. A bit serial ADC uses a RAMP signal and a BITX signal input to a comparator and 1-bit latch, respectively. When RAMP exceeds an analog input value, the comparator triggers the latch to output the value of BITX. The bits are output serially. The RAMP signal has a staircase shape with voltage levels and voltage steps. In the present invention, multiplication by two coefficients is possible. One coefficient is determined by properly designing RAMP, and the other coefficient is determined by properly designing BITX. Multiplication via RAMP is accomplished by changing the voltage levels by a factor of 1/X, where X is the multiplying coefficient (i.e., multiplication by a factor of 0.5 is accomplished by doubling the voltage of the voltage levels). Multiplication via BITX is accomplished by slowing the frequency of BITX by a factor of X. Also disclosed are methods of designing BITX and RAMP such that multiplication via BITX has a high accuracy. Also, the present invention includes methods for data compression/filtering in a photodetector array using the disclosed multiplicat…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.