Simulated memory stack in a stackless environment
US6363473B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 1, 1999 |
| Grant date | Mar 26, 2002 |
| Priority date | — |
| Expiry date | Apr 1, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4486
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system that simulates a memory stack in a non-general purpose register set in the computer's CPU. The computer system can use the simulated memory stack to store a return address before jumping to a subroutine or use the simulated stack to store a data value for subsequent retrieval and use. The non-general purpose register set may include memory type range registers (MTRRs). One of the MTRRs is designated as the stack pointer register and is used to store a pointer index value which identifies which of the other MTRR registers is associated with the top of the simulated memory stack. The computer system preferably includes a non-volatile memory, such as a ROM, which contains executable instructions for implementing the simulated memory stack. The instructions provide for incrementing and decrementing the pointer index value and writing to and reading from the MTRR registers identified by the pointer index as associated with the top of simulated stack. By using non-general purpose registers to store data and return addresses, more general purpose registers are available for other reasons. The computer system advantageously permits the simulation of a conventional memory …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.