Semiconductor device and manufacturing method thereof
US6365433B1 · kind B1 · utility
29Cited by
2References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 25, 2000 |
| Grant date | Apr 2, 2002 |
| Priority date | — |
| Expiry date | Apr 25, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having an overcurrent protection element therein is provided. The device comprises: a substrate having first and second main surfaces; a semiconductor chip fixed to the first main surface of the substrate; a fuse element fixed to the first main surface of the substrate; a cover member fixed to the substrate for sealing the semiconductor chip and the fuse element in an airtight space; and external connecting terminals formed on the second main surface of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.