Vertical sync detection and output for video decoder
US6366327B1 · kind B1 · utility
12Cited by
19References
33Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 30, 1998 |
| Grant date | Apr 2, 2002 |
| Priority date | — |
| Expiry date | Jul 30, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N5/10
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A technique for detecting three modes of video input signal and outputting a vertical sync signal based on the input signal. In a first mode, a standard video signal is received and a line counter is used to decode and output the vertical sync. In a second mode where a non-standard signal is received, line counter cannot be used, but a vertical sync is detected and output. In a third mode, no video input signal is received, yet a vertical sync is output in free-running mode so that a blank screen is displayed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.