Circuitry for reading from and writing to memory cells
US6366502B1 · kind B1 · utility
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1References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2000 |
| Grant date | Apr 2, 2002 |
| Priority date | — |
| Expiry date | Jun 5, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1078
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Circuitry for reading from and writing to memory cells of a group of memory cells. The circuitry comprises read circuitry and write circuitry each connectable to bit lines associated with respective ones of the memory cells. The read circuitry is arranged to read from the cells and the write circuitry is arranged to write to the cells. Wherein the read circuitry and write circuitry are configured so that more cells in the group can be simultaneously written to during a write operation than can be simultaneously read from during a read operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.