Slave interface circuit for providing communication between a peripheral component interconnect (PCI) domain and an advanced system bus (ASB)
US6366973B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 3, 1999 |
| Grant date | Apr 2, 2002 |
| Priority date | — |
| Expiry date | May 3, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4059
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A slave interface circuit for providing communication between a PCI (Peripheral Component Interconnect) bus domain and an ASB (Advanced System Bus) bus domain. The novel circuit is an integrated interface for communicating using the AMBA (Advanced Microcontroller Bus Architecture) ASB protocol and translating ASB commands into PCI like commands. Embodiments include interfaces that are particularly suited for FPGA (field programmable gate array) and ASIC (application specific integrated circuit) implementations. A high-speed embodiment is also discussed allowing prefetch functionality. Input latches catch ASB commands on the falling edge of the ASB clock and then circuits reformat the data using size information and address bits from the ASB bus. This allows byte, halfword and word accesses. Byte readback data are provided on all four byte lanes and halfword readback data are provided on both halfword lanes. The reformatted data is latched into a set of request registers on the next rising edge of the ASB clock. During an ASB read request, the read data is latched on the rising edge of the ASB clock such that the ASB master agent can latch its requested data on the next falling edge…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.