Method and apparatus for selectively performing a plurality of logic operations and memory functions
US6367063B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 5, 1998 |
| Grant date | Apr 2, 2002 |
| Priority date | — |
| Expiry date | Feb 5, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7867
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A logic device for performing a plurality of logic functions employs a plurality of logic elements interconnected by a plurality of switching boxes. A set of configuration bits are provided to the logic. The configuration bits represent a logic circuit that has been partitioned into two or more contexts. A subset of the configuration bits representing the portion of the logic circuit to be performed is selected by a number of context input lines. Operand bits are also provided to the logic element. By using virtualization registers, the output of a logic element in one context can be used as an input in another context. The output for a logic function is selected by the operands and stored in a register bank in such a way that it may later be retrieved by the context number it is associated with.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.