Multi-chip semiconductor module and manufacturing process thereof
US6368894B1 · kind B1 · utility
Inventor
Key dates
| Filing date | Jun 27, 2000 |
| Grant date | Apr 9, 2002 |
| Priority date | — |
| Expiry date | Sep 27, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15787
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process of manufacturing a multi-chip semiconductor module includes: providing a substrate having opposite first and second surfaces, a plurality of conductive vias that extend through the first and second surfaces, a circuit layout patterned on the first surface of the substrate and connected electrically to the conductive vias, and a chip-receiving opening formed therein; mounting a contact pad surface of a first semiconductor chip on the first surface of the substrate such that the first semiconductor chip has a first set of contact pads registered with the chip-receiving opening, and a second set of contact pads around the chip-receiving opening, and connecting electrically the second set of contact pads of the first semiconductor chip to the circuit layout; disposing an adhesive layer having opposite first and second adhesive surfaces and a plurality of windows that extend through the first and second adhesive surfaces inside the chip-receiving opening, and adhering the second adhesive surface of the adhesive layer to the contact pad surface of the first semiconductor chip such that the windows are registered with the first set of contact pads of the first semiconductor chip…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.