Automatic configuration of delay parameters in a dynamic memory controller
US6370067B1 · kind B1 · utility
19Cited by
2References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 25, 2001 |
| Grant date | Apr 9, 2002 |
| Priority date | — |
| Expiry date | Jan 25, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/401
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory controller configured according to a delay pair for communicating with a memory device automatically selects optimal delay pairs by testing whether successful communication exists at various values for the delay pairs. The resulting set of delay pairs allowing successful communication are divided into a boundary set and non-boundary set. An optimal delay pair from the non-boundary set is chosen according to its relationship to delay pairs in the boundary set.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.