Focal plane infrared readout circuit with automatic background suppression
US6373050B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 7, 1999 |
| Grant date | Apr 16, 2002 |
| Priority date | — |
| Expiry date | Oct 7, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01J3/2803
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A circuit for reading out a signal from an infrared detector includes a current-mode background-signal subtracting circuit having a current memory which can be enabled to sample and store a dark level signal from the infrared detector during a calibration phase. The signal stored by the current memory is subtracted from a signal received from the infrared detector during an imaging phase. The circuit also includes a buffered direct injection input circuit and a differential voltage readout section. By performing most of the background signal estimation and subtraction in a current mode, a low gain can be provided by the buffered direct injection input circuit to keep the gain of the background signal relatively small, while a higher gain is provided by the differential voltage readout circuit. An array of such readout circuits can be used in an imager having an array of infrared detectors. The readout circuits can provide a high effective handling capacity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.