CMOS small signal switchable impedence and voltage adjustable terminator with hysteresis receiver network
US6373276B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | May 31, 2000 |
| Grant date | Apr 16, 2002 |
| Priority date | — |
| Expiry date | May 31, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/062
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
CMOS small signal switchable impedence and voltage adjustable terminator with an integrated hysteresis receiver network for carrying small logic level signals for connecting data from a network's first circuit to a network's second circuit in which a network's input terminal connects a terminator circuit to the network's second circuit to act as a terminator on the data line passing data from said first circuit to said second circuit. The terminator circuit has a reference circuit coupled to a terminal circuit. The reference circuit has devices back to back source coupled devices to each other for a tuned center reference voltage node, with their bodies connect to upper and lower level power supplies respectively. An upper level power source is connected to one side of the reference voltage node and a lower reference voltage power source is connected to the other side of the reference voltage node. The voltage level above the common tuned reference voltage and a lower level voltage is supplied to the terminator's corresponding input terminal circuit control nfet and pfet mirror devices whose bodies are also connected respectively to lower and upper level supply power to control eac…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.