Phase alignment system
US6373302B1 · kind B1 · utility
5Cited by
6References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2000 |
| Grant date | Apr 16, 2002 |
| Priority date | — |
| Expiry date | Mar 23, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0814
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus including a clock circuit and a control circuit. The clock circuit may be configured to generate a first output clock, a second output clock and a first control signal in response to (i) a first input clock, (ii) a second input clock, (iii) a second control signal and (iv) a third control signal. The control circuit may be configured to generate the second control signal and the third control signal in response to the first input clock and the first control signal. The first and second output clocks may have a skew less than a predetermined threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.