Apparatus and method for parallel synchronous power converters
US6373732B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 1, 2000 |
| Grant date | Apr 16, 2002 |
| Priority date | — |
| Expiry date | Feb 1, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method of preventing current hogging in parallel connected transformers, and an apparatus for efficiently implementing the method are presented. Current hogging occurs when synchronous power converter transformers operate in a low output current mode. Low output current demands are typically meet by adjusting the duty cycle of the transformer to a low level. This results in the catch FET maintaining a low resistance path to ground for long time periods and allows a stronger one of the parallel power converter transformers to sink current to ground through a weaker transformer. The method consists of using a current sensor to detect low or negative output currents, and then driving the transistor providing the path to ground to an off state. A preferred embodiment of an apparatus to prevent current hogging includes a current sense inductor placed in series with the primary side of the power converter connected to an operational amplifier having an input reference voltage selected to provide an output when the current sense inductor records less than a certain positive voltage. The op amp turns on a driver to force off a transistor which normally conducts to ground when the duty cy…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.