Nonvolatile semiconductor memory
US6373748B1 · kind B1 · utility
55Cited by
2References
32Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 26, 2001 |
| Grant date | Apr 16, 2002 |
| Priority date | — |
| Expiry date | Apr 26, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3468
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One page buffer is connected to one bit line. The page buffer latches program data for a selected memory cell. A plurality of page buffers are connected to a sense amplifier in a read/write circuit through a column gate. In a verify read, read data of a selected column is detected using a sense amplifier used in a normal data read. The read data detected by the sense amplifier, i.e., the verify read result is transferred to the page buffer of the selected column. The value of program data in the page buffer is changed on the basis of the verify read result.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.