Rapid acquisition dispersive channel receiver integrated circuit
US6373910B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 17, 2001 |
| Grant date | Apr 16, 2002 |
| Priority date | — |
| Expiry date | Jan 17, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/03006
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes a reconfigurable FIR filter has an input port for receiving digital input signals and an output coupled to a coherent signal processor and a coherent memory. The FIR filter programmably provides filtered signals to the coherent signal processor for storage in the coherent memory. The integrated circuit further includes a sequential weight processor having an input coupled to an output of the coherent memory. The sequential weight processor includes a weight memory and operates to output symbol soft decision data resulting from processing the digital input signals. The integrated circuit is programmable into one of a plurality of operating modes, including at least one of a received signal acquisition mode, a channel estimator mode, an adaptive equalizer mode, and a channel-wise differential mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.