Content addressable memory (CAM)
US6374325B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 17, 1999 |
| Grant date | Apr 16, 2002 |
| Priority date | — |
| Expiry date | Feb 17, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A content addressable memory (CAM) system (50) is disclosed which includes a CAM array (52) for storing an array of data words. More than one data word is stored on each row with the bits of the data word columns interleaved with each other. The CAM array (52) is accessed during one of several modes of operation in accordance with signals from a bit line controller (54) which activate certain ones of a plurality of bit lines coupling the bit line controller (54) to the CAM array (52). The modes of operation, as indicated by a mode control signal, include a write mode, a read mode and a match mode. In first embodiment of the present invention, the bit line controller (54) sequentially accesses each of the columns of data words by selectively activating certain of the bit lines in accordance with a column address signal and the mode control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.