Method of managing memory for a PCI bus
US6374340B1 · kind B1 · utility
5Cited by
1References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 14, 2000 |
| Grant date | Apr 16, 2002 |
| Priority date | — |
| Expiry date | Apr 14, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S707/99953
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of managing memory includes providing a memory (190) partitioned into a memory tree having N memory levels and different numbers of memory nodes (100, 110, 111, 120, 121, 122, 123, 130, 131, 132, 133, 134, 135, 136, 137) at each of the memory levels, providing a memory request, determining a memory request size, recursively searching partially-full subtrees within the memory tree to identify an empty one of the memory nodes minimizing fragmentation within the memory tree, and allocating the memory request to the empty one of the memory nodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.