Microcap wafer-level package
US6376280B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 1999 |
| Grant date | Apr 23, 2002 |
| Priority date | — |
| Expiry date | Oct 8, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A microcap wafer-level package is provided in which a micro device is connected to bonding pads on a base wafer. A peripheral pad on the base wafer encompasses the bonding pads and the micro device. A cap wafer has gaskets formed thereon using a thick photoresist semiconductor photolithographic process. Bonding pad gaskets match the perimeters of the bonding pads and a peripheral pad gasket matches the peripheral pad on the base wafer. Wells are located inside the perimeters of the bond pad gaskets and are formed to a predetermined depth in the cap wafer. The cap wafer is then placed over the base wafer to cold weld bond the gaskets to the pads and form a hermetically sealed volume between the bonding pad gaskets and the peripheral pad gasket. The cap wafer is then thinned below the predetermined depth until the wells become through holes that provide access to the bonding pads inside the package, but outside the hermetically sealed volume, for connecting wires from a micro device utilizing system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.