Method of semiconductor device fabrication

US6376314B1 · kind B1 · utility

Assignee

• Zetex PLC · GB

Inventor

• Paul Antony Jerred · Manchester, GB

Key dates

• Filing date: May 5, 2000
• Grant date: Apr 23, 2002
• Expiry date: May 5, 2020

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/0297

Abstract

A method of semiconductor device fabrication comprising forming at least the indentation in a surface of a semiconductor body. The indentation is partially filled with a filler material such that walls of the indentation are exposed above an upper surface of the filler material. First and second dopants are introduced through the exposed walls of the indentation and first and second doped regions formed. The first doped region extends into the semiconductor body around the filled portion of the indentation to a first region boundary which is at a predetermined first depth relative to the upper surface of the filler material. The second doped region extends into the semiconductor body around the filled portion of the indentation to a second region boundary which is at a predetermined second depth relative to the upper surface of the filler material. The first and second depths are different such that a region of predetermined thickness is defined adjacent the indentation between the first and second boundaries.