Collar process for reduced deep trench edge bias

US6376324B1 · kind B1 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Jack A. Mandelman · Stormville, US
• Ramachandra Divakaruni · Ossining, US
• Carl Radens · Lagrangeville, US
• Ulrike Gruening · Wappingers Falls, US
• Akira Sudo · Poughkeepsie, US

Key dates

• Filing date: Jun 23, 2000
• Grant date: Apr 23, 2002
• Expiry date: Jun 23, 2020

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/0385

Abstract

Disclosed is a method to provide a new deep trench collar process which reduces encroachment of strap diffusion upon array metal oxide semiconductor field effect transistors (MOSFET's) in semiconductor devices. The invention allows a reduced effective deep trench edge bias at the top of the deep trench, without compromising storage capacitance, by maximizing the distance between the MOSFET gate conductor and the deep trench storage capacitor.