Programmable logic device input/output architecture with power bus segmentation for multiple I/O standards
US6377069B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 2, 2001 |
| Grant date | Apr 23, 2002 |
| Priority date | — |
| Expiry date | May 2, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17788
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a programmable logic device, input/output circuits are grouped into blocks. Each block includes input/output circuits capable of handling a plurality of logic signalling schemes, which may require different supply voltages and reference voltages. Each block also has its own power supply bus. In this way, the different blocks can be provided with different supply and reference voltages, so that different blocks can be used for different logic signalling schemes, thereby allowing more than one such scheme to be used simultaneously on a single device. A single block could also be implemented with more than one scheme active, as long as all of the schemes in use in the block have the same power supply requirements and—to the extent that each such scheme requires a reference voltage—the same reference voltage requirements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.