Definition of physical level of a logic output by a logic input
US6377198B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2000 |
| Grant date | Apr 23, 2002 |
| Priority date | — |
| Expiry date | Mar 20, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/693
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method and apparatus to define and sustain such a physical level by connecting the output through a transmission gate to an input pin. For a certain state of the output, one level of an input may be fed through to the output to generate an output voltage level. In the preferred embodiment of the present invention, a chip select signal {overscore (CS)} is used to define a low level logic signal. An control logic selectively switches a high level logic signal voltage (e.g., V+supply voltage) or the low level logic signal voltage ({overscore (CS)}) to produce an output digital logic signal. In a further embodiment of the present invention, separate logic level signals INH and INL may be selectively switched by control logic to generate an output logic level signal independent of supply voltages V+ and V−.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.