Method and apparatus for controlling bit slippage in high-speed communications systems
US6377645B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 7, 1999 |
| Grant date | Apr 23, 2002 |
| Priority date | — |
| Expiry date | May 7, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/12
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for controlling bit slips in a high-speed, two-way, communications channel. More particularly, the entire communications system, comprising, inter alia, a receiver, a transmitter and the physical communications channel is operated as a feedback loop. That is, the detection of bit slips is performed continuously in the receiver and a bit slip signal is generated that indicates the number of bit slips and the direction, i.e., forward or backward, of the bit slip. Thus, the bit slip signal is communicated to the transmitter and certain actions are performed to introduce bit adjustments in the bit stream to eliminate the effects of any future bit slips. The bit slip signal contains an indication of the number of bit slips which have occurred, the time between bit slips, and the direction of the slip. As a function of this information from the bit slip signal, bit adjustments are made in the communications stream to correct for the bit slips and mitigate any effect in future transmission. For example, such bit adjustments include adding bits to particular data words in the bit stream or repositioning pointers used to traverse the data stream.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.