Apparatus and method for a PHY transmitter with programmable power mode control in CMOS
US6377666B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 29, 1998 |
| Grant date | Apr 23, 2002 |
| Priority date | — |
| Expiry date | Oct 29, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0282
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A transmitter within a line driver circuit is configured to supply data pulses over existing residential wiring. The transmitter is implemented in a CMOS integrated circuit. The transmitter comprises three stages: a front-end digital/analog convertor (DAC), an intermediate DAC, and a current amplifier. The first stage dictates whether the output signal is in high power mode or low power mode. The intermediate DAC, as the second stage, controls the waveform shape and tunes the edge rate, thereby outputting a positive current signal and a negative current signal. The final stage amplifies these current signals to yield current signals having a desired waveform shape, power mode, and edge rate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.