Method of manufacturing a semiconductor device
US6380046B1 · kind B1 · utility
462Cited by
5References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 21, 1999 |
| Grant date | Apr 30, 2002 |
| Priority date | — |
| Expiry date | Jun 21, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6715
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
There is provided a method of removing trap levels and defects, which are caused by stress, from a single crystal silicon thin film formed by an SOI technique. First, a single crystal silicon film is formed by using a typical bonding SOI technique such as Smart-Cut or ELTRAN. Next, the single crystal silicon thin film is patterned to form an island-like silicon layer, and then, a thermal oxidation treatment is carried out in an oxidizing atmosphere containing a halogen element, so that an island-like silicon layer in which the trap levels and the defects are removed is obtained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.