Metal wiring in semiconductor device and method for fabricating the same
US6380079B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 13, 2000 |
| Grant date | Apr 30, 2002 |
| Priority date | — |
| Expiry date | Nov 13, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Metal wiring in a semiconductor device and method for fabricating the same, the metal wiring including a first interlayer insulating film having a first contact hole to a region of a semiconductor substrate, a barrier metal film on an inside surface of the first contact hole, a second interlayer insulating film having a second contact hole to the barrier metal film formed on the first interlayer insulating film, a contact plug in the first and second contact holes in contact with the barrier metal film, and a metal wiring formed on the second interlayer insulating film in contact with the contact plug, whereby permitting to form a barrier metal film under a contact hole regardless of an aspect ratio and an area of the contact hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.