Nonvolatile semiconductor device capable of increased electron injection efficiency
US6380585B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 6, 2000 |
| Grant date | Apr 30, 2002 |
| Priority date | — |
| Expiry date | Jun 6, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6891
Abstract
The nonvolatile semiconductor memory device of the present invention includes: a semiconductor substrate having a surface including a first surface region at a first level, a second surface region at a second level lower than the first level, and a step side region linking the first surface region and the second surface region together; a channel region formed in the first surface region of the semiconductor substrate; a source region and a drain region which are formed in the surface of the semiconductor substrate so as to interpose the channel region therebetween; a first insulating film formed on the surface of the semiconductor substrate; a floating gate formed on the first insulating film; a second insulating film formed on the floating gate; and a control gate which is capacitively coupled to the floating gate via the second insulating film. The drain region includes a low-concentration impurity layer which is formed in the second surface region and which has one end extending toward the step side region, and a high-concentration impurity layer which is connected to the low-concentration impurity layer and which is formed in a region distant from the channel region. As impuri…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.