Output driver having controlled slew rate
US6380777B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 18, 2000 |
| Grant date | Apr 30, 2002 |
| Priority date | — |
| Expiry date | Aug 18, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00208
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An off chip driver circuit is adapted to output differential output signals at high speed rate and capable to drive high external loads without degradation of the output signals. Specifically the driver comprises a first differential pair of transistors having first differential input terminals to respectively receive differential input signals and having first differential output terminals to output the differential output signals. A first current source circuit is connected to a first common terminal of each transistor of the first differential pair of transistors. The current source is sized to provide a first current flow upon receiving the differential input signals. The driver further comprises at least a second differential pair of transistors having second differential output terminals connected in parallel to the first differential output terminals. The second differential pair of transistors respectively receives delayed differential input signals of the differential input signals on respective second differential input terminals. At least a second current source circuit is connected to a second common terminal of each transistor of the second differential pair of transis…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.