Cyclic phase signal generation from a single clock source using current phase interpolation
US6380783B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 13, 2000 |
| Grant date | Apr 30, 2002 |
| Priority date | — |
| Expiry date | Oct 13, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/135
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system and corresponding method for generating multiple phases within a single clock cycle of an input signal is disclosed. The method includes the steps of generating a plurality of output signals from an input source signal, where each of the plurality of output signals represents a phase-shifted version of the input signal. Next, select a pair of signals from the plurality of output signals to act as clock signals, where the selected pair of clock signals define the operating region within which the multiple phases are bounded. Then, provide a pair of complementary weighted bias currents in response to a control signal, where each of the complementary bias currents is used to generate the multiple phases of the present invention. Thereafter, the pair of weighted bias currents presented to a node are adjusted in response to the selected pair of clock signals, where the selected pair of clock signals operates to adjust the rate of change of the weighted bias currents. Finally, a plurality of signals are provided that represent the frequency difference between the first adjusted weighted bias current and a second frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.