High speed low voltage differential signal driver circuit having low sensitivity to fabrication process variation, noise, and operating temperature variation
US6380797B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 25, 2000 |
| Grant date | Apr 30, 2002 |
| Priority date | — |
| Expiry date | Oct 25, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0282
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An LVDS (Low Voltage Differential Signal) driver circuit having low sensitivity to fabrication process variation, power supply noise voltage variation, and operating temperature variation (PVT). The LVDS driver circuit includes a predriver having an input coupled to an internal circuit. The predriver is coupled to a current source. The current source includes a first resistance and is configured to produce a reference current through the first resistance. The reference current is coupled to the predriver to control an output swing of the predriver, the output swing determined by a ratio of the first resistance and a second resistance in the predriver. The ratio of the first and second resistance is such that the output swing is constant across PVT. An output driver is coupled to the predriver to receive the output swing. The output driver has an output for coupling an output signal to an external circuit. The output driver uses the output swing from the predriver to generate the output signal in accordance with the output swing such that the output signal is constant across PVT. The output swing also controls first and second current limiting transistors included in the output driv…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.