Push-pull amplifier circuit with idling current control
US6380808B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 1999 |
| Grant date | Apr 30, 2002 |
| Priority date | — |
| Expiry date | Dec 27, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/3001
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A push-pull amplifier circuit includes a push-pull output circuit having a P-channel FET 11 and an N-channel FET 10 connected in series between supply potentials VDD and VSS, a gate potential difference circuit 16A having ends OP and ON connected to the gates of the FET 11 and FET 10, respectively, wherein the voltage VPN between OP and ON is adjusted depending on a control signal VG3, an input circuit 17 for changing potentials of OP and ON in response to an input voltage VI while keeping the voltage VPN between OP and ON substantially constant, a constant current source 40 for outputting a reference current IS, and an idle current detecting and comparing circuit 30 for detecting a current proportional to an idle current flowing through the FET 11 and FET 10 and generating a control signal VG3 for the circuit 16A so that the detected current approaches a reference current IS. In another configuration, there is provided a voltage control circuit for providing a potential VB=&agr;·VA−&bgr; to the gate of the FET 11 in response to a potential VA provided to the gate of the FET 10, where &agr; and &bgr; are predetermined values, and a constant current source connected in …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.