Dual processor retention assembly
US6381148B1 · kind B1 · utility
22Cited by
13References
33Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 9, 1998 |
| Grant date | Apr 30, 2002 |
| Priority date | — |
| Expiry date | Dec 9, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K7/1431
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A processor retention assembly is disclosed. An embodiment of the processor retention assembly includes a first dual processor retention module and a second dual processor retention module. A connecting member is attached to the first dual processor retention module at a first end and is attached to the second dual processor retention module at a second end. In accordance with another embodiment of the present invention, covers are hingedly attached to each of the first and second dual processor retention modules.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.