Flat panel display with reduced electron scattering effects
US6384527B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 20, 1995 |
| Grant date | May 7, 2002 |
| Priority date | — |
| Expiry date | Nov 20, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2329/8665
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A flat panel display is disclosed which includes a faceplate with a faceplate interior side, and a backplate including a backplate interior side in an opposing relationship to the faceplate interior side. Side walls are positioned between the faceplate and the backplate. The side walls, faceplate and backplate form an enclosed sealed envelope. A plurality of phosphor subpixels are positioned at the faceplate interior side. A plurality of field emitters are positioned at the backplate interior side. The field emitters emit electrons which strike corresponding phosphor subpixels. A plurality of scattering shields surround each phosphor subpixel and define a subpixel volume. The scattering shields reduce the number of scattered electrons exiting from their corresponding subpixel volume. This reduces the number of scattered electrons from charging internal insulating surfaces in the envelope, as well as striking the non-corresponding phosphor subpixels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.