Wafer burn-in testing method
US6384613B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 22, 1998 |
| Grant date | May 7, 2002 |
| Priority date | — |
| Expiry date | Apr 22, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2862
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for burn-in testing a complete wafer comprising the steps of first providing a wafer, and then forming a plurality of bumps thereon. Next, a tape-automated bonding tape having a plurality of bonding pads is designed and fabricated, wherein each bonding pad includes a corresponding circuit and an external contact point. Then, electrical connections between the bonding pads and the bumps are made and a plurality of voltages and currents are supplied through the tape-automated bonding tape for carrying out burn-in tests. Bum-in tests are performed for the whole wafer. Defective chips are singled out after the wafer is cut up and only good chips are used for subsequent packaging. Therefore, production cost can be saved and packaging yield can be increased. Furthermore, a multiple circuit layers design can be employed to fabricate the tape-automated bonding tape. Consequently, circuits necessary for carrying out the burn-in test for the whole wafer is simplified.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.