Level shifter
US6384808B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 5, 2001 |
| Grant date | May 7, 2002 |
| Priority date | — |
| Expiry date | Mar 5, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0289
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A compact level shifter is provided, which has a low consumption power and speedy operation, capable of easily performing a level conversion of voltage levels having a large difference. A voltage regulating circuit (10a), a P channel MOS electric field effect transistor (hereinafter referred to as PMOST), a PMOST (103), and an N channel MOS electric field effect transistor (hereinafter referred to as NMOST) (105) are connected in series between 2 power sources. Similarly, a voltage regulating circuit (10b), a PMOST (102), a PMOST (104), and an NMOST (106) are connected in series between 2 power sources. During the flow of a penetrating current in a transient period of a level conversion operation, a power source voltage is effectively reduced by the above-mentioned voltage regulating circuit, whereby the level conversion of the voltage level having a large difference is made easy.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.