Nonvolatile semiconductor memory and read method
US6385085B2 · kind B2 · utility
13Cited by
8References
5Claims
0Family size
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Key dates
| Filing date | Apr 10, 2001 |
| Grant date | May 7, 2002 |
| Priority date | — |
| Expiry date | Apr 10, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5642
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a nonvolatile semiconductor memory in which multiple-value information is stored in one memory cell by setting a plurality of threshold values, data is successively read from word lines while continuously changing the word-line read level from a lowest level to a highest level, and the next bit line is selectively precharged in accordance with the data stored in latch means for storing read data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.