Method for manufacturing precision electroplated solder bumps
US6387793B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 9, 2000 |
| Grant date | May 14, 2002 |
| Priority date | — |
| Expiry date | Mar 9, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K3/3473
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabrication of a solder bump, comprising applying preferably an insulating film, followed by applying a multilayer underbump metallization, a layer of a photoresist, and a thin layer of titanium on a substrate containing, preferably, III-V semiconductor circuits. The multilayer UBM pad, preferably comprising a 0.02 to 0.05 micrometer thick layer of titanium, a 0.5 to 1.0 micrometer thick layer of nickel and a 0.1 to 0.2 thick layer of gold. The protective film with the thickness of preferably 0.5 to 40 micrometer comprises a photoresist. After the solder has been electroplated, the protective film is removed, preferably by dry etching or with a solvent. The titanium film serves a dual function of being a membrane for electroplating of the solder and of being a non-wettable dam for wetting back of the plated solder. The titanium film with the thickness of 200 to 1,000 Angstroms is preferably deposited by evaporation. After the solder has been electroplated, much of the titanium film is removed, preferably by wet etching or dry etching, leaving only a band of titanium that surrounds the disk of solder. A multilayer solder bump structure for III-V semiconductor circuits m…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.