Method of correcting topographical effects on a micro-electronic substrate
US6387808B1 · kind B1 · utility
3Cited by
6References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 21, 2000 |
| Grant date | May 14, 2002 |
| Priority date | — |
| Expiry date | Aug 16, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31056
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of correcting topographical effects on a microelectronic substrate, the method comprising the steps consisting in depositing a layer of resin on the structure to be planarized having topography in relief surrounded by isolation zones, and subjecting said resin layer in its zones superposed on underlying zones of high topographical density to photolithography by means of a mask possessing a standard mesh without any one-to-one coincidence with the underlying topography.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.