Integrating dual supply voltages using a single extra mask level

US6388288B1 · kind B1 · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• Karthik Vasanth · Dallas, US
• Sharad Saxena · Richardson, US
• Richard G. Burch · McKinney, US
• Purnendu K. Mozumder · Dallas, US
• Joseph C. Davis · Allen, US
• Chenjing Fernando · Lyndhurst, US
• Suraj Rao · Dallas, US

Key dates

• Filing date: Mar 25, 1999
• Grant date: May 14, 2002
• Expiry date: Mar 25, 2019

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038

Abstract

Integration of dual voltages on a single chip can be accomplished with a minimum of extra masks by optimizing only the MDD implant of the peripheral transistors, while other implants remain the same for both transistor types. This meets lifetime specifications without unnecessary expense.