Oscillator control circuitry for phase lock loop providing enhanced phase noise and spurious signal performance
US6388481B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 1, 2001 |
| Grant date | May 14, 2002 |
| Priority date | — |
| Expiry date | May 1, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/18
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Oscillator control circuitry for a phase lock loop, including phase detection circuitry, control signal generator circuitry, bias control circuitry and charge pump circuitry. The control signal generator circuitry introduces specific and distinct time delays to the phase signals from the phase detection circuitry representing the phase difference between the reference and oscillator output signals. These time delays cause the bias control circuitry to enable and disable the output charge pump circuitry slightly before and after, respectively, those time intervals during which an output source (“pump up”) or sink (“pump down”) current is needed to drive the oscillator via the loop filter. This produces charge pump circuitry output signals with significantly faster rise and fall times and shorter pulse widths, thereby resulting in a charge pump output signal with higher SNR and reduced spurious signal energy.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.