Apparatus and method for transmitting data serially for use with an advanced technology attachment packet interface (atapi)
US6388590B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 24, 1999 |
| Grant date | May 14, 2002 |
| Priority date | — |
| Expiry date | Sep 24, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/385
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A transmission interface compatible with the AT Attachment Packet Interface (ATAPI) that achieves transfer rates greater than those possible with an Integrated Disc Electronics (IDE) bus. The transmission interface includes a transmission ATAPI circuit, a packetizing circuit and a converter. The transmission ATAPI circuit monitors the content of the ATAPI and, when a change is detected, generates a first set of signals representative of that change. The first set of signals are single-ended, parallel to one another and use Transistor-Transistor Logic (TTL) voltage levels. The packetizing circuit packetizes the first set of signals to generate a second set of signals, which representing a packet. The packet payload represents the change in the contents of the ATAPI. The second set of signals are also single-ended, parallel to one another and use TTL voltage levels. The converter converts the second set of signals into a third set of signals and couples these to a serial bus. The third set of signals are serial to one another, and use low voltage level, differential signaling. Thus, the third set of signal are suited for transmission by the serial bus, which includes many fewer wires…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.